A Project-Based HPC Course for Single-Box Computers
Title | A Project-Based HPC Course for Single-Box Computers |
Publication Type | Book Chapter |
Year of Publication | 2016 |
Authors | Bederián, CSergio, Wolovick, N |
Book Title | 2016 Workshop on Education for High-Performance Computing, EduHPC@SC 2016, Salt Lake City, UT, USA, November 14, 2016 |
Pagination | 1–6 |
Publisher | IEEE Computer Society |
Abstract | Throughout three iterations and six years we have developed a project-based course in HPC for single-box computers tailored to science students in general. The course is based on strong premises: showing that assembly is what actually runs on machines, dividing parallelism in three dimensions (ILP, DLP, TLP), and using them incrementally in a single numerical simulation throughout the course working in interdisciplinary pairs (CS, non-CS). The final goal is to explore how to use all the available transistors in a die. Assembly proved a great tool to show how bare-metal works, an alternative-semantics approach to programs, and a tool to demystify compiler technology. Parallelism is tackled gradually with a clear division into instruction, data, and thread parallelism. GPUs, through CUDA in particular, are used as a radically different approach to the three dimensions of parallelism. Each dimension is explored in a gradual manner, starting from a sequential toy-yet-interesting numerical simulation. After using each form of parallelism and submitting a short report, the experiences are put together in group discussion unveiling the strengths and weaknesses of each form of parallelism for each class of numerical simulation. Although there is a high variance in the students' background, CS and non-CS students pair well in project development, generating understanding and value of the disciplines. The experience proved successful, with former students producing parallel accelerated code of their own in their disciplines. |
URL | https://doi.org/10.1109/EduHPC.2016.005 |
DOI | 10.1109/EduHPC.2016.005 |
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